From: "Mandeep Baines" <[EMAIL PROTECTED]> Date: Wed, 12 Sep 2007 09:47:46 -0700
> Why would disabling IRQ's be expensive on non-MSI PCI devices? > Wouldn't it just require a single MMIO write to clear the interrupt > mask of the device. MMIO's are the most expensive part of the whole interrupt servicing routines and minimizing them is absolutely crucial. This is why many devices do things like report status purely in memory data structures, automatically disable interrupts on either MSI delivery or status register read, etc. Often you will see the first MMIO access in the interrupt handler at the top of the profiles. - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
