On Thu, 11 Mar 2021 18:43:27 +0200 stef...@marvell.com wrote: > According to Armada SoC architecture and design, all the PPv2 ports > which are populated on the same communication processor silicon die > (CP11x) share the same Classifier and Parser engines. > > Armada is an embedded platform and therefore there is a need to reserve > some of the PPv2 ports for different use cases. > > For example, a port can be reserved for a CM3 CPU running FreeRTOS for > management purposes or by user-space data plane application. > > During port reservation all common configurations are preserved and > only RXQ, TXQ, and interrupt vectors are disabled. > Since TXQ's are disabled, the Kernel won't transmit any packet > from this port, and to due the closed RXQ interrupts, the Kernel won't > receive any packet. > The port MAC address and administrative UP/DOWN state can still > be changed. > The only permitted configuration in this mode is MTU change. > The driver's .ndo_change_mtu callback has logic that switches between > percpu_pools and shared pools buffer mode, since the buffer management > not done by Kernel this should be permitted.
Andrew asks good questions. This looks like a strange construct. IMO Linux should either not see the port (like it doesn't see NC-SI), or we need representors for physical and logical ports and explicit forwarding rules.
