From: Danielle Ratson <daniel...@nvidia.com> Extend MFDE (Monitoring FW Debug) register with new field specifying the instruction pointer that triggered the CR space timeout.
Signed-off-by: Danielle Ratson <daniel...@nvidia.com> Reviewed-by: Jiri Pirko <j...@nvidia.com> Signed-off-by: Ido Schimmel <ido...@nvidia.com> --- drivers/net/ethernet/mellanox/mlxsw/reg.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index afd42907092f..a042ff79d306 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -10979,6 +10979,13 @@ MLXSW_ITEM32(reg, mfde, log_address, 0x10, 0, 32); */ MLXSW_ITEM32(reg, mfde, log_id, 0x14, 0, 4); +/* reg_mfde_log_ip + * IP (instruction pointer) that triggered the timeout. + * Valid in case event_id == MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO + * Access: RO + */ +MLXSW_ITEM64(reg, mfde, log_ip, 0x18, 0, 64); + /* reg_mfde_pipes_mask * Bit per kvh pipe. * Access: RO -- 2.29.2
