Hello Andrew, Hello Jakub,
You may can give some suggestions based on your great networking knowledge,
thanks in advance!
I found that add vlan id hw filter (stmmac_vlan_rx_add_vid) have possibility
timeout when accessing VLAN Filter registers during ifup/ifdown stress test,
and restore vlan id hw filter (stmmac_restore_hw_vlan_rx_fltr) always timeout
when access VLAN Filter registers.
My hardware is i.MX8MP (drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c, RGMII
interface, RTL8211FDI-CG PHY), it needs fix mac speed(imx_dwmac_fix_speed), it
indirectly involved in phylink_link_up. After debugging, if phylink_link_up is
called later than adding vlan id hw filter, it will report timeout, so I guess
we need fix mac speed before accessing VLAN Filter registers. Error like below:
[ 106.389879] 8021q: adding VLAN 0 to HW filter on device eth1
[ 106.395644] imx-dwmac 30bf0000.ethernet eth1: Timeout accessing
MAC_VLAN_Tag_Filter
[ 108.160734] imx-dwmac 30bf0000.ethernet eth1: Link is Up -
100Mbps/Full - flow control rx/tx ->->-> which means accessing VLAN Filter
registers before phylink_link_up is called.
Same case when system resume back,
[ 1763.842294] imx-dwmac 30bf0000.ethernet eth1: configuring for
phy/rgmii-id link mode
[ 1763.853084] imx-dwmac 30bf0000.ethernet eth1: No Safety Features
support found
[ 1763.853186] imx-dwmac 30bf0000.ethernet eth1: Timeout accessing
MAC_VLAN_Tag_Filter
[ 1763.873465] usb usb1: root hub lost power or was reset
[ 1763.873469] usb usb2: root hub lost power or was reset
[ 1764.090321] PM: resume devices took 0.248 seconds
[ 1764.257381] OOM killer enabled.
[ 1764.260518] Restarting tasks ... done.
[ 1764.265229] PM: suspend exit
===============================
suspend 12 times
===============================
[ 1765.887915] imx-dwmac 30bf0000.ethernet eth1: Link is Up -
100Mbps/Full - flow control rx/tx ->->-> which means accessing VLAN Filter
registers before phylink_link_up is called.
My question is that some MAC controllers need RXC clock from RGMII interface to
reset DAM or access to some registers. If there is any way to ensure
phylink_link_up is invoked synchronously when we need it. I am not sure this
timeout caused by a fix mac speed is needed before accessing VLAN Filter
registers, is there ang hints, thanks a lot! We have another board i.MX8DXL
which don't need fix mac speed attach to AR8031 PHY, can't reproduce this issue.
Best Regards,
Joakim Zhang
