Use macro DEFAULT_U1_U2_INIT_ENABLE to configure default behaviour of U1/U2 link power state transitions (on/off).
Disable U1/U2 link power state transitions by default to reduce URB processing latency and maximise throughput. Signed-off-by: John Efstathiades <john.efstathia...@pebblebay.com> --- drivers/net/usb/lan78xx.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/net/usb/lan78xx.c b/drivers/net/usb/lan78xx.c index 1c872edc816a..38664b48329a 100644 --- a/drivers/net/usb/lan78xx.c +++ b/drivers/net/usb/lan78xx.c @@ -56,6 +56,8 @@ #define TX_ALIGNMENT (4) #define RXW_PADDING 2 +#define DEFAULT_U1_U2_INIT_ENABLE false + #define MIN_IPV4_DGRAM 68 #define LAN78XX_USB_VENDOR_ID (0x0424) @@ -1351,7 +1353,8 @@ static int lan78xx_link_reset(struct lan78xx_net *dev) phy_ethtool_ksettings_get(phydev, &ecmd); - if (dev->udev->speed == USB_SPEED_SUPER) { + if (DEFAULT_U1_U2_INIT_ENABLE && + dev->udev->speed == USB_SPEED_SUPER) { if (ecmd.base.speed == 1000) { /* disable U2 */ ret = lan78xx_read_reg(dev, USB_CFG1, &buf); @@ -1368,6 +1371,11 @@ static int lan78xx_link_reset(struct lan78xx_net *dev) buf |= USB_CFG1_DEV_U1_INIT_EN_; ret = lan78xx_write_reg(dev, USB_CFG1, buf); } + } else { + ret = lan78xx_read_reg(dev, USB_CFG1, &buf); + buf &= ~USB_CFG1_DEV_U2_INIT_EN_; + buf &= ~USB_CFG1_DEV_U1_INIT_EN_; + ret = lan78xx_write_reg(dev, USB_CFG1, buf); } ladv = phy_read(phydev, MII_ADVERTISE); -- 2.17.1