On Wed, Jan 20, 2021 at 08:59:14PM -0800, Jakub Kicinski wrote: > On Thu, 21 Jan 2021 12:20:35 +0800 Kevin Hao wrote: > > Hmm, why not? > > buf = napi_alloc_frag(pool->rbsize + 128); > > buf = PTR_ALIGN(buf, 128); > > I'd keep the aligning in the driver until there are more users > needing this but yes, I agree, aligning the page frag buffers > seems like a much better fix.
It seems that the DPAA2 driver also need this
(drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c):
/* Prepare the HW SGT structure */
sgt_buf_size = priv->tx_data_offset +
sizeof(struct dpaa2_sg_entry) * num_dma_bufs;
sgt_buf = napi_alloc_frag(sgt_buf_size + DPAA2_ETH_TX_BUF_ALIGN);
if (unlikely(!sgt_buf)) {
err = -ENOMEM;
goto sgt_buf_alloc_failed;
}
sgt_buf = PTR_ALIGN(sgt_buf, DPAA2_ETH_TX_BUF_ALIGN);
Thanks,
Kevin
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