Make sure that if we ever get a MIB counter overflow interrupt (normally
masked off), that the IRQ is cleared.
Signed-off-by: Stephen Hemminger <[EMAIL PROTECTED]>
---
drivers/net/sky2.c | 6 ++++++
1 file changed, 6 insertions(+)
--- 2.6.21-rc1.orig/drivers/net/sky2.c 2007-05-14 12:10:16.000000000 -0700
+++ 2.6.21-rc1/drivers/net/sky2.c 2007-05-14 12:10:18.000000000 -0700
@@ -2345,6 +2345,12 @@ static void sky2_mac_intr(struct sky2_hw
printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n",
dev->name, status);
+ if (status & GM_IS_RX_CO_OV)
+ gma_read16(hw, port, GM_RX_IRQ_SRC);
+
+ if (status & GM_IS_TX_CO_OV)
+ gma_read16(hw, port, GM_TX_IRQ_SRC);
+
if (status & GM_IS_RX_FF_OR) {
++sky2->net_stats.rx_fifo_errors;
sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
--
Stephen Hemminger <[EMAIL PROTECTED]>
-
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