Hi Steen, On Wed, Dec 02, 2020 at 02:04:34PM +0100, Steen Hegelund wrote: > Adding the Sparx5 Serdes driver > > This series of patches provides the serdes driver for the Microchip Sparx5 > ethernet switch. > > The serdes driver supports the 10G and 25G serdes instances available in the > Sparx5. > > The Sparx5 serdes support several interface modes with several speeds and also > allows the client to change the mode and the speed according to changing in > the > environment such as changing cables from DAC to fiber. > > The serdes driver is to be used by the Sparx5 switchdev driver that > will follow in subsequent series. > > History: > -------- > v6 -> v7: > This series changes the way the IO targets are provided to the driver. > Now only one IO range is available in the DT, and the driver has a table > to map its targets (as their order is still not sequential), thus reducing > the DT needed information and binding requirements. > The register access macros have been converted to functions. > > - Bindings: > - reg prop: minItems set to 1 > - reg-names prop: removed > - Driver > - Use one IO range and map targets via this. > - Change register access macros to use functions. > - Provided a new header files with reg access functions. > - Device tree > - Provide only one IO range > > v5 -> v6: > Series error: This had the same content as v5 > > v4 -> v5: > - Bindings: > - Removed .yaml from compatible string > - reg prop: removed description and added minItems > - reg-names prop: removed description and added const name list and > minItems > - #phy-cells prop: removed description and added maxItems > - Configuration interface > - Removed include of linux/phy.h > - Added include of linux/types.h > - Driver > - Added include of linux/phy.h > > v3 -> v4: > - Add a reg-names item to the binding description > - Add a clocks item to the binding description > - Removed the clock parameter from the configuration interface > - Use the clock dt node to get the coreclock, and using that when > doing the actual serdes configuration > - Added a clocks entry with a system clock reference to the serdes node in > the device tree > > v2 -> v3: > - Sorted the Kconfig sourced folders > - Sorted the Makefile included folders > - Changed the configuration interface documentation to use kernel style > > v1 -> v2: Fixed kernel test robot warnings > - Made these structures static: > - media_presets_25g > - mode_presets_25g > - media_presets_10g > - mode_presets_10g > - Removed these duplicate initializations: > - sparx5_sd25g28_params.cfg_rx_reserve_15_8 > - sparx5_sd25g28_params.cfg_pi_en > - sparx5_sd25g28_params.cfg_cdrck_en > - sparx5_sd10g28_params.cfg_cdrck_en > > Lars Povlsen (2): > dt-bindings: phy: Add sparx5-serdes bindings > arm64: dts: sparx5: Add Sparx5 serdes driver node > > Steen Hegelund (2): > phy: Add ethernet serdes configuration option > phy: Add Sparx5 ethernet serdes PHY driver > > .../bindings/phy/microchip,sparx5-serdes.yaml | 100 + > arch/arm64/boot/dts/microchip/sparx5.dtsi | 8 + > drivers/phy/Kconfig | 3 +- > drivers/phy/Makefile | 1 + > drivers/phy/microchip/Kconfig | 12 + > drivers/phy/microchip/Makefile | 6 + > drivers/phy/microchip/sparx5_serdes.c | 2434 +++++++++++++++ > drivers/phy/microchip/sparx5_serdes.h | 129 + > drivers/phy/microchip/sparx5_serdes_regs.h | 2695 +++++++++++++++++ > include/linux/phy/phy-ethernet-serdes.h | 30 + > include/linux/phy/phy.h | 4 + > 11 files changed, 5421 insertions(+), 1 deletion(-) > create mode 100644 > Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml > create mode 100644 drivers/phy/microchip/Kconfig > create mode 100644 drivers/phy/microchip/Makefile > create mode 100644 drivers/phy/microchip/sparx5_serdes.c > create mode 100644 drivers/phy/microchip/sparx5_serdes.h > create mode 100644 drivers/phy/microchip/sparx5_serdes_regs.h > create mode 100644 include/linux/phy/phy-ethernet-serdes.h > > -- > 2.29.2
I think this series is interesting enough that you can at least cc the networking mailing list when sending these? Did that for you now.
