Michael Chan wrote:
[TG3]: Reduce spurious interrupts.
Spurious interrupts are often encountered especially on systems
using the 8259 PIC mode. This is because the I/O write to deassert
the interrupt is posted and won't get to the chip immediately. As
a result, the IRQ may remain asserted after the IRQ handler exits,
causing spurious interrupts.
An unconditional read to flush the I/O write to force the IRQ to de-
assert immediately is not desirable because it impacts performance in
the fast path. So we only do this after we have some indications of
spurious interrupts.
Signed-off-by: Michael Chan <[EMAIL PROTECTED]>
hmmmm, this is a bit questionable that it needs to be here.
I think it's just a fact of life that it is important to flush certain
writes...
I'm not sure a driver needs to be adding code to avoid the obvious
solution. It would be annoying if all drivers had code to do this.
Jeff
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