On Mon, 23 Nov 2020 11:45:22 +0800 DENG Qingfang wrote: > MT762x HW, except for MT7628, supports frame length up to 2048 > (maximum length on GDM), so allow setting MTU up to 2030. > > Signed-off-by: DENG Qingfang <dqf...@gmail.com>
> diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c > b/drivers/net/ethernet/mediatek/mtk_eth_soc.c > index 6d2d60675ffd..27cae3f43972 100644 > --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c > +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c > @@ -353,7 +353,7 @@ static void mtk_mac_config(struct phylink_config *config, > unsigned int mode, > /* Setup gmac */ > mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); > mcr_new = mcr_cur; > - mcr_new |= MAC_MCR_MAX_RX_1536 | MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE | > + mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE | This also changes the default MAX_RX from 1536 to 1518 (0). I think you should at least mention this in the commit message. > MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK; > > /* Only update control register when needed! */ > @@ -320,7 +320,12 @@ > > /* Mac control registers */ > #define MTK_MAC_MCR(x) (0x10100 + (x * 0x100)) > -#define MAC_MCR_MAX_RX_1536 BIT(24) > +#define MAC_MCR_MAX_RX_LEN_MASK GENMASK(25, 24) > +#define MAC_MCR_MAX_RX_LEN(_x) (MAC_MCR_MAX_RX_LEN_MASK & ((_x) << 24)) > +#define MAC_MCR_MAX_RX_LEN_1518 0x0 > +#define MAC_MCR_MAX_RX_LEN_1536 0x1 > +#define MAC_MCR_MAX_RX_LEN_1552 0x2 > +#define MAC_MCR_MAX_RX_LEN_2048 0x3 > #define MAC_MCR_IPG_CFG (BIT(18) | BIT(16)) > #define MAC_MCR_FORCE_MODE BIT(15) > #define MAC_MCR_TX_EN BIT(14)
