Re: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC function

[Marc Kleine-Budde]

On 9/27/20 6:07 PM, Joakim Zhang wrote:
[...]

> +static void flexcan_init_ram(struct net_device *dev)
> +{
> +     struct flexcan_priv *priv = netdev_priv(dev);
> +     struct flexcan_regs __iomem *regs = priv->regs;
> +     u32 reg_ctrl2;
> +     int i;
> +
> +     /* 11.8.3.13 Detection and correction of memory errors:
> +      * CTRL2[WRMFRZ] grants write access to all memory positions that
> +      * require initialization, ranging from 0x080 to 0xADF and
> +      * from 0xF28 to 0xFFF when the CAN FD feature is enabled.
> +      * The RXMGMASK, RX14MASK, RX15MASK, and RXFGMASK registers need to
> +      * be initialized as well. MCR[RFEN] must not be set during memory
> +      * initialization.
> +      */
> +     reg_ctrl2 = priv->read(&regs->ctrl2);
> +     reg_ctrl2 |= FLEXCAN_CTRL2_WRMFRZ;
> +     priv->write(reg_ctrl2, &regs->ctrl2);
> +
> +     for (i = 0; i < ram_init[0].len; i++)
> +             priv->write(0, (void __iomem *)regs + ram_init[0].offset + 
> sizeof(u32) * i);

As the write function only does endian conversion, and you're writing 0 here.
What about using iowrite32_rep() and get rid of the for loop?

Marc

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