On Sun, Jul 19, 2020 at 10:05:30AM +0200, Oleksij Rempel wrote:
> This patch add MDIX configuration ability for AR9331 and AR8035. Theoretically
> it should work on other Atheros PHYs, but I was able to test only this
> two.
>
> Since I have no certified reference HW able to detect or configure MDIX, this
> functionality was confirmed by oscilloscope.
>
> Signed-off-by: Oleksij Rempel <o.rem...@pengutronix.de>
> ---
> drivers/net/phy/at803x.c | 78 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 78 insertions(+)
>
> diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
> index 96c61aa75bd7..101651b2de54 100644
> --- a/drivers/net/phy/at803x.c
> +++ b/drivers/net/phy/at803x.c
> @@ -21,6 +21,17 @@
> #include <linux/regulator/consumer.h>
> #include <dt-bindings/net/qca-ar803x.h>
>
> +#define AT803X_SPECIFIC_FUNCTION_CONTROL 0x10
> +#define AT803X_SFC_ASSERT_CRS BIT(11)
> +#define AT803X_SFC_FORCE_LINK BIT(10)
> +#define AT803X_SFC_MDI_CROSSOVER_MODE_M GENMASK(6, 5)
> +#define AT803X_SFC_AUTOMATIC_CROSSOVER 0x3
> +#define AT803X_SFC_MANUAL_MDIX 0x1
> +#define AT803X_SFC_MANUAL_MDI 0x0
Interestingly, these are the same bits as for the Marvell PHY. I had a
quick look at 802.3. The functionality is standardized, but not the
registers.
Reviewed-by: Andrew Lunn <and...@lunn.ch>
Andrew
