If present, sources the fec's PTP clock straight from the enet PLL, instead of having to be routed via a SoC pad.
This is only possible on certain SoCs, notably the imx6 (quad) plus. Signed-off-by: Sven Van Asbroeck <[email protected]> --- Tree: v5.8-rc3 Patch history: see [PATCH v5 3/3] To: Shawn Guo <[email protected]> To: Andy Duan <[email protected]> To: Rob Herring <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Jakub Kicinski <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Sascha Hauer <[email protected]> Cc: Pengutronix Kernel Team <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: NXP Linux Team <[email protected]> Cc: [email protected] Cc: [email protected] Documentation/devicetree/bindings/net/fsl-fec.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt index 9b543789cd52..e34df25a38f6 100644 --- a/Documentation/devicetree/bindings/net/fsl-fec.txt +++ b/Documentation/devicetree/bindings/net/fsl-fec.txt @@ -39,6 +39,9 @@ Optional properties: tx/rx queues 1 and 2. "int0" will be used for queue 0 and ENET_MII interrupts. For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse per second interrupt associated with 1588 precision time protocol(PTP). +- fsl,ptpclk-bypass-pad: If present, sources the fec's PTP clock straight from + the enet PLL, instead of having to be routed via a SoC pad. This is only + possible on certain SoCs, notably the imx6 (quad) plus. Optional subnodes: - mdio : specifies the mdio bus in the FEC, used as a container for phy nodes -- 2.17.1
