On Thu, Jun 4, 2020 at 2:54 AM Andrew Lunn <and...@lunn.ch> wrote: > If spanning tree is performed in the ASIC, i don't see why there would > be registers to control the port status. It would do it all itself, > and not export these controls. > > So i would not give up on spanning tree as a way to reverse engineer > this.
Hm I guess I have to take out the textbooks and refresh my lacking knowledge about spanning tree :) What I have for "documentation" is the code drop inside DD Wrt: https://svn.dd-wrt.com//browser/src/linux/universal/linux-3.2/drivers/net/ethernet/raeth/rb The code is a bit messy and seems hacked up by Realtek, also at one point apparently the ASIC was closely related to RTL8368s and then renamed to RTL8366RB... The code accessing the ASIC is here (under the name RTL8368s): https://svn.dd-wrt.com/browser/src/linux/universal/linux-3.2/drivers/net/ethernet/raeth/rb/rtl8368s_asicdrv.c I'm hacking on it but a bit stuck :/ Yours, Linus Walleij
