On 22/04/2020 10:21, Oleksij Rempel wrote:
Add support for following phy-modes: rgmii, rgmii-id, rgmii-txid, rgmii-rxid. This PHY has an internal RX delay of 1.2ns and no delay for TX. The pad skew registers allow to set the total TX delay to max 1.38ns and the total RX delay to max of 2.58ns (configurable 1.38ns + build in 1.2ns) and a minimal delay of 0ns. According to the RGMII v1.3 specification the delay provided by PCB traces should be between 1.5ns and 2.0ns. The RGMII v2.0 allows to provide this delay by MAC or PHY. So, we configure this PHY to the best values we can get by this HW: TX delay to 1.38ns (max supported value) and RX delay to 1.80ns (best calculated delay) The phy-modes can still be fine tuned/overwritten by *-skew-ps device tree properties described in: Documentation/devicetree/bindings/net/micrel-ksz90x1.txt Signed-off-by: Oleksij Rempel <o.rem...@pengutronix.de> --- changes v3: - change delay on RX line to 1.80ns - add warning if *-skew-ps properties are used together with not rgmii mode. changes v2: - change RX_ID value from 0x1a to 0xa. The overflow bit was detected by FIELD_PREP() build check. Reported-by: kbuild test robot <l...@intel.com> drivers/net/phy/micrel.c | 128 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 123 insertions(+), 5 deletions(-)
This patch broke networking on at least 5 TI boards: am572x-idk am571x-idk am43xx-hsevm am43xx-gpevm am437x-idk am57xx I can fix. am437x need to investigate. -- Best regards, grygorii
