On Fri, May 01, 2020 at 02:20:52AM +0300, Vadym Kochan wrote:
> Document requirement for the PCI port which is connected to the ASIC, to
> allow access to the firmware related registers.
>
> Signed-off-by: Vadym Kochan <vadym.koc...@plvision.eu>
> ---
> .../devicetree/bindings/net/marvell,prestera.txt | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/marvell,prestera.txt
> b/Documentation/devicetree/bindings/net/marvell,prestera.txt
> index 83370ebf5b89..103c35cfa8a7 100644
> --- a/Documentation/devicetree/bindings/net/marvell,prestera.txt
> +++ b/Documentation/devicetree/bindings/net/marvell,prestera.txt
> @@ -45,3 +45,16 @@ dfx-server {
> ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;
> reg = <MBUS_ID(0x08, 0x00) 0 0x100000>;
> };
> +
> +Marvell Prestera SwitchDev bindings
> +-----------------------------------
> +The current implementation of Prestera Switchdev PCI interface driver
> requires
> +that BAR2 is assigned to 0xf6000000 as base address from the PCI IO range:
> +
> +&cp0_pcie0 {
> + ranges = <0x81000000 0x0 0xfb000000 0x0 0xfb000000 0x0 0xf0000
> + 0x82000000 0x0 0xf6000000 0x0 0xf6000000 0x0 0x2000000
> + 0x82000000 0x0 0xf9000000 0x0 0xf9000000 0x0 0x100000>;
> + phys = <&cp0_comphy0 0>;
> + status = "okay";
The base MAC address should be here as well. As was said for v1,
module parameters are bad.
Andrew
