On Thu, Apr 30, 2020 at 11:49:09AM -0700, Florian Fainelli wrote: > In preparation for doing proper upper bound checking of FDB/MDB entries > being added to the ARL, provide the number of ARL buckets for each > switch chip we support. All chips have 1024 buckets, except 7278 which > has only 256. > > Signed-off-by: Florian Fainelli <f.faine...@gmail.com>
Reviewed-by: Andrew Lunn <and...@lunn.ch>
Andrew
