> +static int tja11xx_config_aneg(struct phy_device *phydev)
> +{
> + u16 ctl = 0;
> + int ret;
> +
> + switch (phydev->master_slave_set) {
> + case PORT_MODE_CFG_MASTER_FORCE:
> + case PORT_MODE_CFG_MASTER_PREFERRED:
> + ctl |= MII_CFG1_MASTER_SLAVE;
> + break;
> + case PORT_MODE_CFG_SLAVE_FORCE:
> + case PORT_MODE_CFG_SLAVE_PREFERRED:
> + break;
> + case PORT_MODE_CFG_UNKNOWN:
> + return 0;
> + default:
> + phydev_warn(phydev, "Unsupported Master/Slave mode\n");
> + return -ENOTSUPP;
> + }
Does the hardware actually support PORT_MODE_CFG_SLAVE_PREFERRED and
PORT_MODE_CFG_MASTER_PREFERRED? I thought that required autoneg, which
this PHY does not support? So i would of expected these two values to
return ENOTSUPP?
Andrew
