From: Vladimir Oltean <olte...@gmail.com> Date: Wed, 16 Oct 2019 21:41:02 +0300
> Adjusting the hardware clock (PTPCLKVAL, PTPCLKADD, PTPCLKRATE) is a > requirement for the auxiliary PTP functionality of the switch > (TTEthernet, PPS input, PPS output). > > Therefore we need to switch to using these registers to keep a > synchronized time in hardware, instead of the timecounter/cyclecounter > implementation, which is reliant on the free-running PTPTSCLK. > > Signed-off-by: Vladimir Oltean <olte...@gmail.com> Applied, thanks.
