On Tue, 15 Oct 2019 22:14:16 +0200, Jiri Pirko wrote: > Tue, Oct 15, 2019 at 09:07:57PM CEST, jakub.kicin...@netronome.com wrote: > >On Sat, 12 Oct 2019 18:27:56 +0200, Jiri Pirko wrote: > >> From: Jiri Pirko <j...@mellanox.com> > >> > >> Add 400Gbps bits to ethtool and introduce support in mlxsw. These modes > >> are supported by the Spectrum-2 switch ASIC. > > > >Thanks for the update, looks good to me! > > > >Out of curiosity - why did we start bunching up LR, ER and FR? > > No clue. But it's been done like that for other speeds too.
Looks like for 50G Serdeses and 4x25G we started grouping by Clause. Probably makes sense.
