On Mon, Jul 8, 2019 at 11:22 PM Andrew Lunn <and...@lunn.ch> wrote: > > On Mon, Jul 08, 2019 at 11:16:02PM -0400, kwangdo yi wrote: > > I simply fixed this issue by increasing the polling time from 20 msec to > > 60 msec in Xilinx EMAC driver. But the state machine would be in a > > better shape if it is capable of handling sub system driver's fake failure. > > PHY device driver could advertising the min/max timeouts for its subsystem, > > but still some vendor's EMAC driver fails to meet the deadline if this value > > is not set properly in PHY driver. > > Hi Kwangdo > > That is not how MDIO works. The PHY has two clock cycles to prepare > its response to any request. There is no min/max. This was always an > MDIO bus driver problem, not a PHY problem. > > Andrew
Hi Andrew, I don't think PHY driver has a problem, nor EMAC driver has, but if PHY driver is capable of handling EMAC driver's fake failure, the PHY driver would be in a better fit. That's the intention of this patch. But, it seems this timeout needs to be handled in each MDIO driver properly. Thanks. Regards,
