From: Vladimir Oltean <olte...@gmail.com> Date: Sat, 8 Jun 2019 19:12:26 +0300
> This patchset configures the Tunable Delay Lines of the SJA1105 P/Q/R/S > switches. These add a programmable phase offset on the RGMII RX and TX > clock signals and get used by the driver for fixed-link interfaces that > use the rgmii-id, rgmii-txid or rgmii-rxid phy-modes. > > Tested on a board where RGMII delays were already set up, by adding > MAC-side delays on the RGMII interface towards a BCM5464R PHY and > noticing that the MAC now reports SFD, preamble, FCS etc. errors. > > Conflicts trivially in drivers/net/dsa/sja1105/sja1105_spi.c with > https://patchwork.ozlabs.org/project/netdev/list/?series=112614&state=* > which must be applied first. Series applied, thanks.
