From: Nirranjan Kirubaharan <nirran...@chelsio.com> Date: Fri, 7 Jun 2019 04:56:45 -0700
> Spread initial IRQ affinity hints across the device node CPUs, > for nic queue and uld queue IRQs, to load balance and avoid > all interrupts on CPU0. > > Signed-off-by: Nirranjan Kirubaharan <nirran...@chelsio.com> > --- > v2: > - Used post increment of msi_index instead of pre increment in > request_msix_queue_irqs() during unwind. > - Fixed build error Reported-by: kbuild test robot <l...@intel.com> > on xtensa architecture. Applied.
