On 5/15/19 8:24 AM, Andrew Lunn wrote: >> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c >> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c >> @@ -251,6 +251,9 @@ static int socfpga_dwmac_set_phy_mode(struct >> socfpga_dwmac *dwmac) >> case PHY_INTERFACE_MODE_SGMII: >> val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII; >> break; >> + case PHY_INTERFACE_MODE_RMII: >> + val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII; >> + break; > > What about PHY_INTERFACE_MODE_RMII_ID, PHY_INTERFACE_MODE_RMII_RXID, > PHY_INTERFACE_MODE_RMII_TXID?
RMII is reduced MII not Reduced Gigabit MII (RGMII), which still operates at MII speed, therefore no concept of internal deal for RX/TX data lines, the change looks fine to me. -- Florian
