>> +static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private)
>> +{
>> + struct aq_nic_s *self = private;
>> +
>> + if (!self)
>> + return IRQ_NONE;
>> +
>> + aq_nic_update_link_status(self);
>> +
>> + self->aq_hw_ops->hw_irq_enable(self->aq_hw,
>> + BIT(self->aq_nic_cfg.link_irq_vec));
>
> So does this mean the hardware disables interrupts when they fire? Is
> this an ack, not an enable?
Right, hw has a feature of interrupts automasking on trigger.
This is essentially an unmasking operation.
> Can you loose interrupts this way? Or are the internally level
> interrupts, so it could immediately fire again if the source has not
> been services?
Pending masked ISR will trigger as soon as we enable it again.
So it won't be lost.
Regards,
Igor
