The MDIO addresses of the internal PHYs on this switch for ports 1-5
have addresses 0-4, not 1-5.

Signed-off-by: Marek Behún <marek.be...@nic.cz>
Cc: Andrew Lunn <and...@lunn.ch>
Cc: Florian Fainelli <f.faine...@gmail.com>
Cc: Michal Vokáč <voka...@gmail.com>
Cc: John Crispin <j...@phrozen.org>
Cc: Wei Yongjun <weiyongj...@huawei.com>
---
 drivers/net/dsa/qca8k.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index cdcde7f8e0b2..eb199193cc3b 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -625,7 +625,7 @@ qca8k_phy_read(struct dsa_switch *ds, int phy, int regnum)
 {
        struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
 
-       return mdiobus_read(priv->bus, phy, regnum);
+       return mdiobus_read(priv->bus, phy - 1, regnum);
 }
 
 static int
@@ -633,7 +633,7 @@ qca8k_phy_write(struct dsa_switch *ds, int phy, int regnum, 
u16 val)
 {
        struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
 
-       return mdiobus_write(priv->bus, phy, regnum, val);
+       return mdiobus_write(priv->bus, phy - 1, regnum, val);
 }
 
 static void
-- 
2.19.2

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