On 28.02.2019 15:04, Andrew Lunn wrote: > On Thu, Feb 28, 2019 at 12:51:54AM +0100, Heiner Kallweit wrote: >> On 28.02.2019 00:19, Andrew Lunn wrote: >>>> >From what you've described, it sounds like what you actually have is: >>>> >>>> MAC <---> Serdes PHY <---> PHY >>>> >>>> The Serdes PHY receives the SGMII in-band negotiation from the external >>>> PHY, but there is no propagation of the status from the serdes PHY to >>>> the MAC. >>> >>> Yes, that is a good description. So far, we have not yet got the MAC >>> to read the speed and duplex from the SERDES to configure itself. In >>> theory it should be able to, it is all in the same device. >>> >>> It might be that once the SERDES interrupts saying it has link we need >>> to program the MAC with the result of the in-band signalling. in-band >>> then seems a bit pointless. Or we are missing some configuration >>> somewhere to tell the MAC to use the in-band signalling result from >>> the SERDES. >>> >> I'll play a little with it and see whether I get it working. > > Hi Heiner > > It would be good to get the MAC using the in-band signalling. Try bit > 12. The table of cmodes does suggest SGMII mode should have that bit > set. > I have it working now. SGMII PHY status register 4.a003 holds the auto-negotiated parameters. These I propagate to the port control register (setting the port to forced mode). I still need to beautify the patch a little.
In general still missing seems to be 10G SERDES support. 10G uses other registers in the PHYXS device. As usual I had two problems in parallel what doesn't make debugging easier. Second one was that I had two ports from the ZII DTU connected to the same switch. Both ports have the same MAC address what confused the switch. > Andrew > Heiner
