On 24.02.2019 21:15, David Miller wrote:
>
> Heiner, please look at net-next which I just merged net into.
>
> Net had a bug fix wherein the MDIO_AN_10GBT_CTRL_ADV_NBT_MASK
> bits are cleared in the 10gbt control register to work around
> a problem with some marvell10g phy chips.
>
> In the merge I preserved your usage of the generic c45 helpers
> in this area, but I suspect part of that will have to be undone
> in order to accomodate the above fix.
>
Thanks for the info. Let me add Maxime as author of the fix.
I think we talk about his one "net: phy: marvell10g:
Fix Multi-G advertisement to only advertise 10G" and we talk
about net-next.
IMO the proper way to fix this is removing the unsupported
modes from phydev->advertising in config_init.
Then mv3310_config_aneg doesn't have to be touched.
A similar exercise I did here:
0974f1f03b07 ("net: phy: aquantia: remove false 5G and 10G speed ability for
AQCS109")
> Thanks.
>
Heiner
