In order to get PCIe legacy interrupts working on gru-based Chromebooks,
let's move the wake-up interrupt out of the way and into its own
subnode. This ensures that this interrupt specifier will not be
mistaken as a PCI interrupt.

Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
index c400be64170e..61fff688770c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
@@ -310,11 +310,13 @@ ap_i2c_tp: &i2c5 {
                compatible = "pci1b4b,2b42";
                reg = <0x83010000 0x0 0x00000000 0x0 0x00100000
                       0x83010000 0x0 0x00100000 0x0 0x00100000>;
-               interrupt-parent = <&gpio0>;
-               interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
                pinctrl-names = "default";
                pinctrl-0 = <&wlan_host_wake_l>;
-               wakeup-source;
+               wake-up {
+                       interrupt-parent = <&gpio0>;
+                       interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+                       wakeup-source;
+               };
        };
 };
 
-- 
2.20.1

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