From: Ido Schimmel <ido...@mellanox.com> Date: Wed, 20 Feb 2019 19:32:10 +0000
> Petr says: > > Spectrum-2 will be configured with a different set of pools than > Spectrum-1, their sizes will be larger, and the individual quotas will > be different as well. It is therefore necessary to make the shared > buffer module aware of this dependence on chip type, and adjust the > individual tables. > > In patch #1, introduce a structure for keeping per-chip immutable and > default values. > > In patch #2, structures for keeping current values of SBPM and SBPR > (pool configuration and port-pool quota) are allocated dynamically to > support varying pool counts. > > In patches #3 to #7, uses of individual shared buffer configuration > tables are migrated from global definitions to fields in struct > mlxsw_sp_sb_vals, which was introduced above. > > Up until this point, the actual configuration is still the one suitable > for Spectrum-1. In patch #8 Spectrum-2 configuration is added. > > In patch #9, port headroom configuration is changed to take into account > current recommended value for a 100-Gbps port, and the split factor. > > In patch #10, requests for overlarge headroom are rejected. This avoids > potential chip freeze should such overlarge requests be made. Series applied, thanks.
