> -----Original Message-----
> From: Pankaj Bansal
> Sent: Tuesday, February 5, 2019 10:02 PM
> To: Leo Li <leoyang...@nxp.com>
> Cc: Shawn Guo <shawn...@kernel.org>; Andrew Lunn <and...@lunn.ch>;
> Florian Fainelli <f.faine...@gmail.com>; netdev@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org
> Subject: RE: [PATCH v2] arm64: dts: lx2160aqds: Add mdio mux nodes
>
>
>
> > -----Original Message-----
> > From: Li Yang [mailto:leoyang...@nxp.com]
> > Sent: Wednesday, 6 February, 2019 12:07 AM
> > To: Pankaj Bansal <pankaj.ban...@nxp.com>
> > Cc: Shawn Guo <shawn...@kernel.org>; Andrew Lunn
> <and...@lunn.ch>;
> > Florian Fainelli <f.faine...@gmail.com>; netdev@vger.kernel.org;
> > linux-arm- ker...@lists.infradead.org
> > Subject: Re: [PATCH v2] arm64: dts: lx2160aqds: Add mdio mux nodes
> >
> > On Mon, Feb 4, 2019 at 2:53 AM Pankaj Bansal <pankaj.ban...@nxp.com>
> > wrote:
> > >
> > > The two external MDIO buses used to communicate with phy devices
> > > that are external to SOC are muxed in LX2160AQDS board.
> > >
> > > These buses can be routed to any one of the eight IO slots on
> > > LX2160AQDS board depending on value in fpga register 0x54.
> > >
> > > Additionally the external MDIO1 is used to communicate to the
> > > onboard RGMII phy devices.
> > >
> > > The mdio1 is controlled by bits 4-7 of fpga register and mdio2 is
> > > controlled by bits 0-3 of fpga register.
> > >
> > > Signed-off-by: Pankaj Bansal <pankaj.ban...@nxp.com>
> > > ---
> > >
> > > Notes:
> > > V2:
> > > - removed unnecassary TODO statements
> > > - removed device_type from mdio nodes
> > > - change the case of hex number to lowercase
> > > - removed board specific comments from soc file
> >
> > There are still some comments from V1 haven't been addressed.
> >
> > >
> > > .../boot/dts/freescale/fsl-lx2160a-qds.dts | 115 +++++++++++++++++
> > > .../boot/dts/freescale/fsl-lx2160a.dtsi | 18 +++
> > > 2 files changed, 133 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> > > b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> > > index 99a22abbe725..2c3020a72d41 100644
> > > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> > > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> > > @@ -46,6 +46,121 @@
> > > &i2c0 {
> > > status = "okay";
> > >
> > > + fpga@66 {
> > > + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c";
> > > + reg = <0x66>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > +
> > > + mdio-mux-1@54 {
> >
> > Still no compatible string defined for the node. Probably should be
> > "mdio-mux- mmioreg", "mdio-mux"
>
> it is not a specific device. MDIO mux is meant to be controlled by some
> registers of parent device (FPGA).
> Therefore, IMO this should not be a device and there should not be any
> "compatible" property for it.
If it is not a device why we are defining a device node for it? It is probably
not a physical device per se, but it can be considered a virtual device
provided by FPGA.
This also bring up another question that why this device cannot reuse the
existing drivers/net/phy/mdio-mux-mmioreg.c driver? If we think regmap is a
better solution, shall we replace the mmioreg driver with the regmap driver?
>
> >
> > > + mdio-parent-bus = <&emdio1>;
> > > + reg = <0x54>; /* BRDCFG4 */
> > > + mux-mask = <0xf8>; /* EMI1_MDIO */
> > > + #address-cells=<1>;
> > > + #size-cells = <0>;
> > > +
> > > + mdio@0 {
> > > + reg = <0x00>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@40 {
> > > + reg = <0x40>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@c0 {
> > > + reg = <0xc0>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@c8 {
> > > + reg = <0xc8>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@d0 {
> > > + reg = <0xd0>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@d8 {
> > > + reg = <0xd8>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@e0 {
> > > + reg = <0xe0>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@e8 {
> > > + reg = <0xe8>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@f0 {
> > > + reg = <0xf0>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@f8 {
> > > + reg = <0xf8>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + };
> > > +
> > > + mdio-mux-2@54 {
> > > + mdio-parent-bus = <&emdio2>;
> > > + reg = <0x54>; /* BRDCFG4 */
> > > + mux-mask = <0x07>; /* EMI2_MDIO */
> > > + #address-cells=<1>;
> > > + #size-cells = <0>;
> > > +
> > > + mdio@0 {
> > > + reg = <0x00>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@1 {
> > > + reg = <0x01>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@2 {
> > > + reg = <0x02>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@3 {
> > > + reg = <0x03>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@4 {
> > > + reg = <0x04>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@5 {
> > > + reg = <0x05>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@6 {
> > > + reg = <0x06>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + mdio@7 {
> > > + reg = <0x07>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + };
> > > + };
> > > + };
> > > +
> > > i2c-mux@77 {
> > > compatible = "nxp,pca9547";
> > > reg = <0x77>;
> > > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > index a79f5c1ea56d..a74045ad22ad 100644
> > > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > @@ -762,5 +762,23 @@
> > > <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
> > > dma-coherent;
> > > };
> > > +
> > > + /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
> > > + emdio1: mdio@8b96000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8b96000 0x0 0x1000>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + little-endian; /* force the driver in LE
> > > + mode */
> >
> > Still doesn't fully align with the binding at
> > "Documentation/devicetree/bindings/powerpc/fsl/fman.txt".
> >
> > It should either have the "interrupts" property for external MDIO or
> > "fsl,fman- internal-mdio" for internal MDIO.
>
> I see that for DPAA1 based SOCs, there was definitely an interrupt property
> in external MDIO node.
> BUT, for DPAA2 based devices none of the SOC has this property. I am
> looking further into this.
>
> >
> > > + };
> > > +
> > > + /* WRIOP0: 0x8b8_0000, E-MDIO2: 0x1_7000 */
> > > + emdio2: mdio@8b97000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8b97000 0x0 0x1000>;
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + little-endian; /* force the driver in LE mode */
> > > + };
> > > };
> > > };
> > > --
> > > 2.17.1
> > >
