Use the phy_interface_mode_is_8023z() helper for detecting interface
modes that use 802.3z serial encoding.  This is equivalent to testing
for both 1000base-X and 2500base-X.

Signed-off-by: Russell King <rmk+ker...@armlinux.org.uk>
---
 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 38 ++++++++++---------------
 1 file changed, 15 insertions(+), 23 deletions(-)

diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 
b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index f1dab0b55769..c54ed19dcdae 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
@@ -1090,9 +1090,8 @@ static void mvpp22_gop_unmask_irq(struct mvpp2_port *port)
        u32 val;
 
        if (phy_interface_mode_is_rgmii(port->phy_interface) ||
-           port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-           port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-           port->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
+           phy_interface_mode_is_8023z(port->phy_interface) ||
+           port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
                /* Enable the GMAC link status irq for this port */
                val = readl(port->base + MVPP22_GMAC_INT_SUM_MASK);
                val |= MVPP22_GMAC_INT_SUM_MASK_LINK_STAT;
@@ -1122,9 +1121,8 @@ static void mvpp22_gop_mask_irq(struct mvpp2_port *port)
        }
 
        if (phy_interface_mode_is_rgmii(port->phy_interface) ||
-           port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-           port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-           port->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
+           phy_interface_mode_is_8023z(port->phy_interface) ||
+           port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
                val = readl(port->base + MVPP22_GMAC_INT_SUM_MASK);
                val &= ~MVPP22_GMAC_INT_SUM_MASK_LINK_STAT;
                writel(val, port->base + MVPP22_GMAC_INT_SUM_MASK);
@@ -1136,9 +1134,8 @@ static void mvpp22_gop_setup_irq(struct mvpp2_port *port)
        u32 val;
 
        if (phy_interface_mode_is_rgmii(port->phy_interface) ||
-           port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-           port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-           port->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
+           phy_interface_mode_is_8023z(port->phy_interface) ||
+           port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
                val = readl(port->base + MVPP22_GMAC_INT_MASK);
                val |= MVPP22_GMAC_INT_MASK_LINK_STAT;
                writel(val, port->base + MVPP22_GMAC_INT_MASK);
@@ -1259,9 +1256,8 @@ static void mvpp2_port_loopback_set(struct mvpp2_port 
*port,
        else
                val &= ~MVPP2_GMAC_GMII_LB_EN_MASK;
 
-       if (port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-           port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-           port->phy_interface == PHY_INTERFACE_MODE_2500BASEX)
+       if (phy_interface_mode_is_8023z(port->phy_interface) ||
+           port->phy_interface == PHY_INTERFACE_MODE_SGMII)
                val |= MVPP2_GMAC_PCS_LB_EN_MASK;
        else
                val &= ~MVPP2_GMAC_PCS_LB_EN_MASK;
@@ -2487,9 +2483,8 @@ static irqreturn_t mvpp2_link_status_isr(int irq, void 
*dev_id)
                                link = true;
                }
        } else if (phy_interface_mode_is_rgmii(port->phy_interface) ||
-                  port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-                  port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
-                  port->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
+                  phy_interface_mode_is_8023z(port->phy_interface) ||
+                  port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
                val = readl(port->base + MVPP22_GMAC_INT_STAT);
                if (val & MVPP22_GMAC_INT_STAT_LINK) {
                        event = true;
@@ -4581,8 +4576,7 @@ static void mvpp2_gmac_config(struct mvpp2_port *port, 
unsigned int mode,
        ctrl0 &= ~MVPP2_GMAC_PORT_TYPE_MASK;
        ctrl2 &= ~(MVPP2_GMAC_PORT_RESET_MASK | MVPP2_GMAC_PCS_ENABLE_MASK);
 
-       if (state->interface == PHY_INTERFACE_MODE_1000BASEX ||
-           state->interface == PHY_INTERFACE_MODE_2500BASEX) {
+       if (phy_interface_mode_is_8023z(state->interface)) {
                /* 1000BaseX and 2500BaseX ports cannot negotiate speed nor can
                 * they negotiate duplex: they are always operating with a fixed
                 * speed of 1000/2500Mbps in full duplex, so force 1000/2500
@@ -4602,9 +4596,8 @@ static void mvpp2_gmac_config(struct mvpp2_port *port, 
unsigned int mode,
        if (phylink_test(state->advertising, Asym_Pause))
                an |= MVPP2_GMAC_FC_ADV_ASM_EN;
 
-       if (state->interface == PHY_INTERFACE_MODE_SGMII ||
-           state->interface == PHY_INTERFACE_MODE_1000BASEX ||
-           state->interface == PHY_INTERFACE_MODE_2500BASEX) {
+       if (phy_interface_mode_is_8023z(state->interface) ||
+           state->interface == PHY_INTERFACE_MODE_SGMII) {
                an |= MVPP2_GMAC_IN_BAND_AUTONEG;
                ctrl2 |= MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK;
 
@@ -4665,9 +4658,8 @@ static void mvpp2_mac_config(struct net_device *dev, 
unsigned int mode,
        if (state->interface == PHY_INTERFACE_MODE_10GKR)
                mvpp2_xlg_config(port, mode, state);
        else if (phy_interface_mode_is_rgmii(state->interface) ||
-                state->interface == PHY_INTERFACE_MODE_SGMII ||
-                state->interface == PHY_INTERFACE_MODE_1000BASEX ||
-                state->interface == PHY_INTERFACE_MODE_2500BASEX)
+                phy_interface_mode_is_8023z(state->interface) ||
+                state->interface == PHY_INTERFACE_MODE_SGMII)
                mvpp2_gmac_config(port, mode, state);
 
        if (port->priv->hw_version == MVPP21 && port->flags & MVPP2_F_LOOPBACK)
-- 
2.7.4

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