Hi Nicolas,
On Fri, Jan 25, 2019 at 3:58 PM <nicolas.fe...@microchip.com> wrote:
>
> On 24/01/2019 at 14:38, Harini Katakam wrote:
> > The interrupt handler contains a workaround for RX hang applicable
> > to Zynq and AT91 only. Subsequent versions do not need this
>
> AT91RM9200 only. It's not the case for other AT91 SoCs (reading errata
> list for them).
>
> That being said I have to add a patch for making this perfectly clear in
> the comment just above the flag's test.
>
> > workaround. This workaround unecessarily resets RX whenever RX used
>
> Typo: unnecessarily
>
> > bit read is observed, which can be often under heavy traffic. Hence
> > introduce an CAPS mask and a check to enable this workaround.
>
> Nack for this one, see below...
Thanks for the review. I dint realize it was AT91RM9200, hence I edited
the wrong config structure. Will fix.
<snip>
> > if (status & MACB_BIT(RXUBR)) {
> > - ctrl = macb_readl(bp, NCR);
> > - macb_writel(bp, NCR, ctrl & ~MACB_BIT(RE));
> > - wmb();
> > - macb_writel(bp, NCR, ctrl | MACB_BIT(RE));
> > + if (bp->caps & MACB_CAPS_NEEDS_RSTONUBR) {
> > + ctrl = macb_readl(bp, NCR);
> > + macb_writel(bp, NCR, ctrl & ~MACB_BIT(RE));
> > + wmb();
> > + macb_writel(bp, NCR, ctrl | MACB_BIT(RE));
> > + }
>
> As this interrupt routine is not doing anything else than just being
> called now, what about just removing the use of this status bit for
> platforms which don't need this RX reset?
OK, sure I'll try that. I left the interrupt enabled just in case there were
other users performing an action/using this interrupt.
Regards,
Harini
