On 12/13/2018 07:53 PM, Florian Fainelli wrote:
> Le 12/12/18 à 6:01 PM, Marek Vasut a écrit :
>> Add driver for the NXP TJA1100 and TJA1101 PHYs. These PHYs are special
>> BroadRReach 100BaseT1 PHYs used in automotive.
>>
>> Signed-off-by: Marek Vasut <ma...@denx.de>
>> ---
>
> [snip]
>
>> +#define PHY_ID_MASK 0xfffffff0
>> +#define PHY_ID_TJA1100 0x0180dc40
>> +#define PHY_ID_TJA1101 0x0180dd00
>> +
>> +#define MII_ECTRL 17
>
> Stylistic preference, but for register offsets, using hexadecimal may be
> more natural than using decimal.
This is in-line with the TJA1100 datasheet, where they for whatever
reason use decimal offsets, so I'd like to keep it this way. It saves me
one conversion between bases.
> [snip]
>
>> +static int tja11xx_soft_reset(struct phy_device *phydev)
>> +{
>> + int ret;
>> +
>> + ret = tja11xx_enable_reg_write(phydev);
>> + if (ret < 0)
>> + return ret;
>> +
>> + ret = phy_write(phydev, 0x0, 0xa100);
>> + return ret < 0 ? ret : 0;
>
> Can you utilize genphy_soft_reset() here or at least not open code the
> register offset and the bits you write to (use MII_BMCR and
> BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_RESET).
genphy_soft_reset() is fine, changed.
--
Best regards,
Marek Vasut
