On Sun, Oct 7, 2018 at 5:01 PM <[email protected]> wrote:
>
> + /* HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
> + * create a IOMMU mapping for the physcial address configured by
> + * firmware and reconfig RVU_AF_MSIXTR_BASE with IOVA.
> + */
> + cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST);
> + max_msix = cfg & 0xFFFFF;
> + phy_addr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE);
> + iova = dma_map_single(rvu->dev, (void *)phy_addr,
> + max_msix * PCI_MSIX_ENTRY_SIZE,
> + DMA_BIDIRECTIONAL);
> + if (dma_mapping_error(rvu->dev, iova))
> + return -ENOMEM;
> +
> + rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE, (u64)iova);
> + rvu->msix_base_iova = iova;
> +
I'm a bit puzzled by how this works. Does this rely on a specific iommu
driver implementation? Normally a physical address makes no sense to the
implementation backing dma_map_single() that tries to convert a
linear kernel virtual address into a physical address.
Arnd
