David Miller <[email protected]> wrote:
> Probably you are seeing some interrupt mitigation.
>
> It seems there is a difference in how the interrupt mitigation is
> programmed on for 8168 chips vs. others by default. Most get
> all zeros in the IntrMitigate register, whilst for 8168 chips
> a value of 0x5151 is programmed.
I'm not sure what that means. I can't seem to find a programmer's manual for
the chip.
> You can play with ethtool to mess with the coalescing settings
> to see if this is part of the problem.
These bits from "ethtool -c enp3s0"?
rx-usecs: 200
rx-frames: 4
rx-usecs-irq: 0
rx-frames-irq: 0
tx-usecs: 200
tx-frames: 4
tx-usecs-irq: 0
tx-frames-irq: 0
> I bet this might explain the behavior you see after including
> even Heiner's TXCFG_AUTO_FIFO patch.
Thanks,
David
