tree: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git master head: c3ec8bcceb07ab81e4ff017b4ebbacc137a5a15e commit: 7e8d5755be0e6c92d3b86a85e54c6a550b1910c5 [13/125] net: nixge: Add support for 64-bit platforms config: i386-randconfig-i1-09170930 (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: git checkout 7e8d5755be0e6c92d3b86a85e54c6a550b1910c5 # save the attached .config to linux build tree make ARCH=i386
All warnings (new ones prefixed by >>):
drivers/net//ethernet/ni/nixge.c: In function 'nixge_hw_dma_bd_release':
>> drivers/net//ethernet/ni/nixge.c:254:9: warning: cast to pointer from
>> integer of different size [-Wint-to-pointer-cast]
skb = (struct sk_buff *)
^
In file included from include/linux/skbuff.h:17:0,
from include/linux/if_ether.h:23,
from include/linux/etherdevice.h:25,
from drivers/net//ethernet/ni/nixge.c:7:
drivers/net//ethernet/ni/nixge.c: In function 'nixge_hw_dma_bd_init':
>> drivers/net//ethernet/ni/nixge.c:130:37: warning: cast from pointer to
>> integer of different size [-Wpointer-to-int-cast]
(bd)->field##_lo = lower_32_bits(((u64)addr)); \
^
include/linux/kernel.h:234:33: note: in definition of macro 'lower_32_bits'
#define lower_32_bits(n) ((u32)(n))
^
drivers/net//ethernet/ni/nixge.c:145:2: note: in expansion of macro
'nixge_hw_dma_bd_set_addr'
nixge_hw_dma_bd_set_addr((bd), sw_id_offset, (addr))
^~~~~~~~~~~~~~~~~~~~~~~~
drivers/net//ethernet/ni/nixge.c:326:3: note: in expansion of macro
'nixge_hw_dma_bd_set_offset'
nixge_hw_dma_bd_set_offset(&priv->rx_bd_v[i], skb);
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net//ethernet/ni/nixge.c:131:37: warning: cast from pointer to
integer of different size [-Wpointer-to-int-cast]
(bd)->field##_hi = upper_32_bits(((u64)addr)); \
^
include/linux/kernel.h:228:35: note: in definition of macro 'upper_32_bits'
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
^
drivers/net//ethernet/ni/nixge.c:145:2: note: in expansion of macro
'nixge_hw_dma_bd_set_addr'
nixge_hw_dma_bd_set_addr((bd), sw_id_offset, (addr))
^~~~~~~~~~~~~~~~~~~~~~~~
drivers/net//ethernet/ni/nixge.c:326:3: note: in expansion of macro
'nixge_hw_dma_bd_set_offset'
nixge_hw_dma_bd_set_offset(&priv->rx_bd_v[i], skb);
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net//ethernet/ni/nixge.c: In function 'nixge_recv':
drivers/net//ethernet/ni/nixge.c:604:9: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
skb = (struct sk_buff *)nixge_hw_dma_bd_get_addr(cur_p,
^
In file included from include/linux/skbuff.h:17:0,
from include/linux/if_ether.h:23,
from include/linux/etherdevice.h:25,
from drivers/net//ethernet/ni/nixge.c:7:
>> drivers/net//ethernet/ni/nixge.c:130:37: warning: cast from pointer to
>> integer of different size [-Wpointer-to-int-cast]
(bd)->field##_lo = lower_32_bits(((u64)addr)); \
^
include/linux/kernel.h:234:33: note: in definition of macro 'lower_32_bits'
#define lower_32_bits(n) ((u32)(n))
^
drivers/net//ethernet/ni/nixge.c:145:2: note: in expansion of macro
'nixge_hw_dma_bd_set_addr'
nixge_hw_dma_bd_set_addr((bd), sw_id_offset, (addr))
^~~~~~~~~~~~~~~~~~~~~~~~
drivers/net//ethernet/ni/nixge.c:646:3: note: in expansion of macro
'nixge_hw_dma_bd_set_offset'
nixge_hw_dma_bd_set_offset(cur_p, new_skb);
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net//ethernet/ni/nixge.c:131:37: warning: cast from pointer to
integer of different size [-Wpointer-to-int-cast]
(bd)->field##_hi = upper_32_bits(((u64)addr)); \
^
include/linux/kernel.h:228:35: note: in definition of macro 'upper_32_bits'
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
^
drivers/net//ethernet/ni/nixge.c:145:2: note: in expansion of macro
'nixge_hw_dma_bd_set_addr'
nixge_hw_dma_bd_set_addr((bd), sw_id_offset, (addr))
^~~~~~~~~~~~~~~~~~~~~~~~
drivers/net//ethernet/ni/nixge.c:646:3: note: in expansion of macro
'nixge_hw_dma_bd_set_offset'
nixge_hw_dma_bd_set_offset(cur_p, new_skb);
^~~~~~~~~~~~~~~~~~~~~~~~~~
vim +254 drivers/net//ethernet/ni/nixge.c
126
127 #ifdef CONFIG_PHYS_ADDR_T_64BIT
128 #define nixge_hw_dma_bd_set_addr(bd, field, addr) \
129 do { \
> 130 (bd)->field##_lo = lower_32_bits(((u64)addr)); \
131 (bd)->field##_hi = upper_32_bits(((u64)addr)); \
132 } while (0)
133 #else
134 #define nixge_hw_dma_bd_set_addr(bd, field, addr) \
135 ((bd)->field##_lo = lower_32_bits((addr)))
136 #endif
137
138 #define nixge_hw_dma_bd_set_phys(bd, addr) \
139 nixge_hw_dma_bd_set_addr((bd), phys, (addr))
140
141 #define nixge_hw_dma_bd_set_next(bd, addr) \
142 nixge_hw_dma_bd_set_addr((bd), next, (addr))
143
144 #define nixge_hw_dma_bd_set_offset(bd, addr) \
145 nixge_hw_dma_bd_set_addr((bd), sw_id_offset, (addr))
146
147 #ifdef CONFIG_PHYS_ADDR_T_64BIT
148 #define nixge_hw_dma_bd_get_addr(bd, field) \
149 (dma_addr_t)((((u64)(bd)->field##_hi) << 32) |
((bd)->field##_lo))
150 #else
151 #define nixge_hw_dma_bd_get_addr(bd, field) \
152 (dma_addr_t)((bd)->field##_lo)
153 #endif
154
155 struct nixge_tx_skb {
156 struct sk_buff *skb;
157 dma_addr_t mapping;
158 size_t size;
159 bool mapped_as_page;
160 };
161
162 struct nixge_priv {
163 struct net_device *ndev;
164 struct napi_struct napi;
165 struct device *dev;
166
167 /* Connection to PHY device */
168 struct device_node *phy_node;
169 phy_interface_t phy_mode;
170
171 int link;
172 unsigned int speed;
173 unsigned int duplex;
174
175 /* MDIO bus data */
176 struct mii_bus *mii_bus; /* MII bus reference */
177
178 /* IO registers, dma functions and IRQs */
179 void __iomem *ctrl_regs;
180 void __iomem *dma_regs;
181
182 struct tasklet_struct dma_err_tasklet;
183
184 int tx_irq;
185 int rx_irq;
186
187 /* Buffer descriptors */
188 struct nixge_hw_dma_bd *tx_bd_v;
189 struct nixge_tx_skb *tx_skb;
190 dma_addr_t tx_bd_p;
191
192 struct nixge_hw_dma_bd *rx_bd_v;
193 dma_addr_t rx_bd_p;
194 u32 tx_bd_ci;
195 u32 tx_bd_tail;
196 u32 rx_bd_ci;
197
198 u32 coalesce_count_rx;
199 u32 coalesce_count_tx;
200 };
201
202 static void nixge_dma_write_reg(struct nixge_priv *priv, off_t offset,
u32 val)
203 {
204 writel(val, priv->dma_regs + offset);
205 }
206
207 static void nixge_dma_write_desc_reg(struct nixge_priv *priv, off_t
offset,
208 dma_addr_t addr)
209 {
210 writel(lower_32_bits(addr), priv->dma_regs + offset);
211 #ifdef CONFIG_PHYS_ADDR_T_64BIT
212 writel(upper_32_bits(addr), priv->dma_regs + offset + 4);
213 #endif
214 }
215
216 static u32 nixge_dma_read_reg(const struct nixge_priv *priv, off_t
offset)
217 {
218 return readl(priv->dma_regs + offset);
219 }
220
221 static void nixge_ctrl_write_reg(struct nixge_priv *priv, off_t offset,
u32 val)
222 {
223 writel(val, priv->ctrl_regs + offset);
224 }
225
226 static u32 nixge_ctrl_read_reg(struct nixge_priv *priv, off_t offset)
227 {
228 return readl(priv->ctrl_regs + offset);
229 }
230
231 #define nixge_ctrl_poll_timeout(priv, addr, val, cond, sleep_us,
timeout_us) \
232 readl_poll_timeout((priv)->ctrl_regs + (addr), (val), (cond), \
233 (sleep_us), (timeout_us))
234
235 #define nixge_dma_poll_timeout(priv, addr, val, cond, sleep_us,
timeout_us) \
236 readl_poll_timeout((priv)->dma_regs + (addr), (val), (cond), \
237 (sleep_us), (timeout_us))
238
239 static void nixge_hw_dma_bd_release(struct net_device *ndev)
240 {
241 struct nixge_priv *priv = netdev_priv(ndev);
242 dma_addr_t phys_addr;
243 struct sk_buff *skb;
244 int i;
245
246 for (i = 0; i < RX_BD_NUM; i++) {
247 phys_addr = nixge_hw_dma_bd_get_addr(&priv->rx_bd_v[i],
248 phys);
249
250 dma_unmap_single(ndev->dev.parent, phys_addr,
251 NIXGE_MAX_JUMBO_FRAME_SIZE,
252 DMA_FROM_DEVICE);
253
> 254 skb = (struct sk_buff *)
255 nixge_hw_dma_bd_get_addr(&priv->rx_bd_v[i],
256 sw_id_offset);
257 dev_kfree_skb(skb);
258 }
259
260 if (priv->rx_bd_v)
261 dma_free_coherent(ndev->dev.parent,
262 sizeof(*priv->rx_bd_v) * RX_BD_NUM,
263 priv->rx_bd_v,
264 priv->rx_bd_p);
265
266 if (priv->tx_skb)
267 devm_kfree(ndev->dev.parent, priv->tx_skb);
268
269 if (priv->tx_bd_v)
270 dma_free_coherent(ndev->dev.parent,
271 sizeof(*priv->tx_bd_v) * TX_BD_NUM,
272 priv->tx_bd_v,
273 priv->tx_bd_p);
274 }
275
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