On Tue, Jul 10, 2018 at 10:03:33AM -0700, Olof Johansson wrote:
> Hi Russell,
> > @@ -663,13 +679,27 @@ static inline void emit_a32_mov_r(const s8 dst, const
> > s8 src,
> > static inline void emit_a32_mov_r64(const bool is64, const s8 dst[],
> > const s8 src[],
> > struct jit_ctx *ctx) {
> > - emit_a32_mov_r(dst_lo, src_lo, ctx);
> > - if (is64) {
> > + if (!is64) {
> > + emit_a32_mov_r(dst_lo, src_lo, ctx);
> > + /* Zero out high 4 bytes */
> > + emit_a32_mov_i(dst_hi, 0, ctx);
> > + } else if (__LINUX_ARM_ARCH__ < 6 &&
> > + ctx->cpu_architecture < CPU_ARCH_ARMv5) {
> > /* complete 8 byte move */
> > + emit_a32_mov_r(dst_lo, src_lo, ctx);
> > emit_a32_mov_r(dst_hi, src_hi, ctx);
>
>
> Tiny nit: Looks like you compare for >= ARMv5TE above and <ARMv5 here.
Good catch, I'll fix it, and it gives me some satisfaction that
someone is reviewing this JIT code closely! IMHO, JITs need a lot
of scrutiny.
> I'm not aware of any vanilla v5 implementations (all I can find are
> v5TE or <=v4T), so it doesn't seem like something actually causing
> problems. Mostly pointing it out for consistency's sake.
They're rare - I think the only one is an ARM1020 (ARMv5T) as opposed
to the ARM1020E (ARMv5TE). Whether any are in the wild or not is
another matter.
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