Hi Bhadram,
On 28-05-2018 10:15, Bhadram Varka wrote:
> Hi Jose,
>
> On 5/25/2018 8:02 PM, Jose Abreu wrote:
>> On 25-05-2018 15:25, Bhadram Varka wrote:
>>> Hi Jose,
>>>
>>> On 5/25/2018 7:35 PM, Jose Abreu wrote:
>>>> Hi Bhadram,
>>>>
>>>> On 25-05-2018 05:41, Bhadram Varka wrote:
>>>>> Hi Jose,
>>>>>
>>>>> On 5/24/2018 3:01 PM, Jose Abreu wrote:
>>>>>> Hi Bhadram,
>>>>>>
>>>>>> On 24-05-2018 06:58, Bhadram Varka wrote:
>>>>>>>
>>>>>>> After some time if check Tx descriptor status - then I see
>>>>>>> only
>>>>>>> below
>>>>>>>
>>>>>>> [..]
>>>>>>> [85788.286730] 027 [0x827951b0]: 0xf854f000 0x0 0x16d8
>>>>>>> 0x90000000
>>>>>>>
>>>>>>> index 025 and 026 descriptors processed but not index 027.
>>>>>>>
>>>>>>> At this stage Tx DMA is always in below state -
>>>>>>>
>>>>>>> ■ 3'b011: Running (Reading Data from system memory
>>>>>>> buffer and queuing it to the Tx buffer (Tx FIFO))
>>>>>>
>>>>>> Thats strange, I think the descriptors look okay though. I
>>>>>> will
>>>>>> need the registers values (before the lock) and, if
>>>>>> possible, the
>>>>>> git bisect output.
>>>>>
>>>>> Attaching the register dump file after the issue observed.
>>>>> Please check once.
>>>>>
>>>>
>>>> ----->8-----
>>>> 0x112c = 0x0000003F
>>>> 0x11ac = 0x0000003F
>>>> 0x122c = 0x0000003F
>>>> 0x12ac = 0x0000003F
>>>>
>>>> 0x1130 = 0x0000003F
>>>> 0x11b0 = 0x0000003F
>>>> 0x1230 = 0x0000003F
>>>> 0x12b0 = 0x0000003F
>>>> ----->8-----
>>>>
>>>> This can't be right, it should be DMA_{RX/TX}_SIZE - 1 =
>>>> 511. Did
>>>> you change these values in the code?
>>>>
>>>
>>> Yes. I have changed the descriptor length to 64 - so that
>>> searching for the current descriptor status would be easy.
>>
>> Ok, it shouldn't impact anything. The only thing I'm remembering
>> now is that you can have TSO not enabled in all DMA channels (HW
>> configuration allows this). Please check if TSO in single-queue
>> works.
> TSO works fine if only single queue enabled. I don't see any
> limitation from HW side because TSO works fine with other
> driver which we received from Synopsys with IP drop.
You need to check with HW team if TSO is enabled for all channels
because you can have TSO channels < DMA channels and there is no
way to confirm this in the registers. Also check if received
driver is routing packets to queue != 0.
Thanks and Best Regards,
Jose Miguel Abreu
>
>
> Thanks,
> Bhadram.
