On Wed, May 9, 2018 at 8:43 AM, Lukas Wunner <[email protected]> wrote: > When sending packets as fast as possible using "cangen -g 0 -i -x", the > HI-3110 occasionally latches the interrupt pin high on completion of a > packet, but doesn't set the TXCPLT bit in the INTF register. The INTF > register contains 0x00 as if no interrupt has occurred. Even waiting > for a few milliseconds after the interrupt doesn't help. > > Work around this apparent erratum by instead checking the TXMTY bit in > the STATF register ("TX FIFO empty"). We know that we've queued up a > packet for transmission if priv->tx_len is nonzero. If the TX FIFO is > empty, transmission of that packet must have completed. > > Note that this is congruent with our handling of received packets, which > likewise gleans from the STATF register whether a packet is waiting in > the RX FIFO, instead of looking at the INTF register. > > Cc: Mathias Duckeck <[email protected]> > Cc: Akshay Bhat <[email protected]> > Cc: Casey Fitzpatrick <[email protected]> > Cc: [email protected] # v4.12+ > Signed-off-by: Lukas Wunner <[email protected]> > ---
Acked-by: Akshay Bhat <[email protected]>
