On Wed, May 09, 2018 at 11:38:49AM -0400, Vivien Didelot wrote: > Only the 88E6185 family has bits 15:12 Cascade Port bits in the Global > Control 2 register. Hence inconsistent values are actually written in > this register for other families. > > Add a .set_cascade_port operation to isolate the 88E6185 case, and call > it from the device mapping setup function. > > Signed-off-by: Vivien Didelot <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]> Andrew
