> -----Original Message----- > From: Sinan Kaya [mailto:[email protected]] > Sent: Friday, March 16, 2018 9:46 PM > To: [email protected]; [email protected]; [email protected] > Cc: [email protected]; [email protected]; > Sinan Kaya <[email protected]>; Patil, Harish <[email protected]>; > Chopra, Manish <[email protected]>; Dept-GE Linux NIC Dev <Dept- > [email protected]>; [email protected] > Subject: [PATCH v3 11/18] qlcnic: Eliminate duplicate barriers on > weakly-ordered > archs > > Code includes wmb() followed by writel(). writel() already has a barrier on > some > architectures like arm64. > > This ends up CPU observing two barriers back to back before executing the > register write. > > Since code already has an explicit barrier call, changing writel() to > writel_relaxed(). > > Signed-off-by: Sinan Kaya <[email protected]> > --- > drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c > b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c > index 46b0372..97c146e7 100644 > --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c > +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c > @@ -478,7 +478,7 @@ irqreturn_t qlcnic_83xx_clear_legacy_intr(struct > qlcnic_adapter *adapter) > wmb(); > > /* clear the interrupt trigger control register */ > - writel(0, adapter->isr_int_vec); > + writel_relaxed(0, adapter->isr_int_vec); > intr_val = readl(adapter->isr_int_vec); > do { > intr_val = readl(adapter->tgt_status_reg); > -- > 2.7.4
Acked-by: Manish Chopra <[email protected]> Thanks.
