2017-08-30 0:23 GMT+03:00 Florian Fainelli <f.faine...@gmail.com>:
> On 08/29/2017 02:15 PM, Pavel Machek wrote:
>> On Tue 2017-08-29 14:26:04, Andrew Lunn wrote:
>>>> But the MDIO emaulation code is from their driver, after lots of
>>>> deletions.
>>>
>>> Is this driver supposed to run on lots of different OSs? That would
>>> explain why they ignored the Linux MDIO and PHY layers.
>>
>> It did not look particulary portable.
>
> Part of the problem is that they need to duplicate the standard MII
> definitions, whereas we could re-use those from include/linux/mii.h
> and/or mdio.h.
>
>>
>>> If possible, please make use of the Linux infrastructure.
>>
>> I did not find any infrastructure I could use instead
>> ksz_mdio_emulation.
>
> fixed PHY/swphy.c is as close as it could get, but it is a highly
> simplified version of this.
>
>>
>> Now, drivers/net/phy/spi_ks8995.c can access the PHY registers, and I
>> can not see any translation there, so there may be something I'm
>> missing.
>
> I don't see anything in that driver that seems to access PHY registers
> what makes you think it does?
>
> There's got to be a way to perform indirect accesses through SPI,
> Woojung, do you know?
>
As I understand they just attach phy on spi bus with generic driver:
phy_addr = 0;
phy_mode = PHY_INTERFACE_MODE_MII;
snprintf(bus_id, MII_BUS_ID_SIZE, "sw.%d", sw_device_present);
snprintf(phy_id, MII_BUS_ID_SIZE, PHY_ID_FMT, bus_id, phy_addr);
phydev = phy_attach(netdev, phy_id, 0, phy_mode);
if (!IS_ERR(phydev)) {
phydev->adjust_link = sw_adjust_link;
return phydev;
}
Where is bus is:
bus = mdiobus_alloc();
bus->read = ksz_mii_read; (spi read function)
bus->write = ksz_mii_write;
Then just generic reads:
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
Maxim.
>>
>> Pointers would be welcome at this point.
>>
>> Thanks,
>> Pavel
>>
>
>
> --
> Florian
--
Best regards,
Maxim Uvarov
