Hi Francois,
Thanks again for all your feedback. I have implemented most of your
suggestions,
> > /* Enable phy clocks to the MAC */
> > hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
> > hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
> > smsc911x_reg_write(hwcfg, pdata, HW_CFG);
> > udelay(10); /* Enough time
for clocks to restart */
>
> (back to my original question that I should have reworded in a different
> thread)
>
> Does the platform guarantees that the register write has actually
reached
> the real register when the udelay is issued ?
I think so, but maybe you can help me check. The LAN911x device is always
directly connected to a simple SRAM-like host bus, and smsc911x_reg_write
is implemented using readl. Does this implicitly guarantee it to be
volatile?
> >
> > if (!pdata->software_irq_signal) {
> > printk(KERN_WARNING "%s: ISR failed
signaling test (IRQ %d)\n",
> > dev->name, dev->irq);
> > return -ENODEV;
> > }
> > SMSC_TRACE("IRQ handler passed test using IRQ %d",
dev->irq);
> >
> > printk(KERN_INFO "%s: SMSC911x/921x identified at %#08lx,
IRQ: %d\n",
> > dev->name, (unsigned long)pdata->ioaddr,
dev->irq);
> >
> > spin_lock_irqsave(&pdata->phy_lock, flags);
>
> flags useless: ->open() is issued in irq-enabled context.
How do you mean? I thought an irq-enabled context meant i DO have to
disable irqs?
> > unsigned long flags;
> >
> > SMSC_TRACE("ioctl cmd 0x%x", cmd);
> > switch (cmd) {
> > case SIOCGMIIPHY:
> > case SIOCDEVPRIVATE:
>
> The SIOCDEVPRIVATE can/should be removed.
I have removed these, they were only in as a quick fix because mii-tool
here sends SIOCDEVPRIVATE instead of SIOCGMIIPHY. I fixed my copy of
mii-tool instead :o)
Best Regards,
--
Steve Glendinning
SMSC GmbH
m: +44 777 933 9124
e: [EMAIL PROTECTED]
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