On Thu, Jun 01, 2017 at 02:09:00PM +0100, Russell King - ARM Linux wrote: > On Thu, Jun 01, 2017 at 03:05:27PM +0200, Andrew Lunn wrote: > > So you are saying a 10G PHY driver always needs to have a aneg_done > > callback, even if it just needs to call phygen_c45_aneg_done? > > > > This seems a bit error prone. I can see somebody writing a 10G driver, > > leaving out aneg_done() and having the c22 version called. Is the read > > of MII_BMSR likely to return 0xffff, since the register does not > > exist? If so, genphy_aneg_done() is likely to always return > > BMSR_ANEGCOMPLETE. > > Don't forget that the read will fail, so phy_read() will return a > negative number.
By fail, you mean return something like -EIO or -ETIMEOUT? Is this guaranteed in the code somewhere? This particular Marvell PHY only does c45. But i could imagine some other PHYs answering a c22 request with 0xffff. Andrew