From: Holger Brunck <holger.bru...@keymile.com> Date: Wed, 17 May 2017 17:24:38 +0200
> This adds support for hdlc-bus mode to the fsl_ucc_hdlc driver. This can > be enabled with the "fsl,hdlc-bus" property in the DTS node of the > corresponding ucc. > > This aligns the configuration of the UPSMR and GUMR registers to what is > done in our ucc_hdlc driver (that only support hdlc-bus mode) and with > the QuickEngine's documentation for hdlc-bus mode. > > GUMR/SYNL is set to AUTO for the busmode as in this case the CD signal > is ignored. The brkpt_support is enabled to set the HBM1 bit in the > CMXUCR register to configure an open-drain connected HDLC bus. > > Signed-off-by: Holger Brunck <holger.bru...@keymile.com> Applied.
