On 5/11/17 6:29 PM, David Miller wrote:
This whole thing go me thinking however. What do you expect to happen on 32-bit architectures implementing an eBPF JIT?
I doubt any 32-bit cpu architectures will do JIT in the near future. Doing 64-bit operations everywhere is too painful in assembler. HW offloading is a different story. Like nfp has 32-bit registers and everything 64-bit in bpf is not the ideal for them. For such cases the idea is to teach verifier to recognize that registers don't use upper 32-bits and mark them, so JITs can be more efficient.
That's going to create some serious conflicts and consternation wrt. tracing which is going to want to use headers which are for sizeof(void *)==4 whereas for eBPF natively it's 8.
that is indeed a problem. The bpf tracing approach that includes kernel headers mostly doesn't work on 32-bit archs, though few iovisor/bcc scripts should be functional. Those that don't walk pointers and relying on tracepoints instead.
