On 4/24/17 4:02 PM, David Miller wrote:
cbcond combines a compare with a branch into a single instruction. The limitations are: 1) Only newer chips support it 2) For immediate compares we are limited to 5-bit signed immediate values 3) The branch displacement is limited to 10-bit signed 4) We cannot use it for JSET
llvm doesn't know how to generate it yet. So it's only seen after classic->extended conversion. Hence not a concern at all for this optimization.
Also, cbcond (unlike all other sparc control transfers) lacks a delay slot. Currently we don't have a useful instruction we can push into the delay slot of normal branches. So using cbcond pretty much always increases code density, and is therefore a win. Signed-off-by: David S. Miller <da...@davemloft.net>
Nice! Acked-by: Alexei Starovoitov <a...@kernel.org> That puts up a pressure to optimize x64 JIT too :)
