From: Jiri Pirko <j...@resnulli.us> Date: Tue, 28 Mar 2017 17:24:09 +0200
> From: Jiri Pirko <j...@mellanox.com> > > Arkadi says: > > While doing the hardware offloading process much of the hardware > specifics cannot be presented. An example for such is the routing > LPM algorithm which differ in hardware implementation from the > kernel software implementation. The only information the user receives > is whether specific route is offloaded or not, but he cannot really > understand the underlying implementation nor get the specific statistics > related to that process. > > Another example is ACL offload using TC which is commonly implemented > using TCAM memory. Currently there is no capability to gain visibility > into the TCAM structure and to debug suboptimal resource allocation. > > This patchset introduces capability for exporting the ASICs pipeline > abstraction via devlink infrastructure, which should serve as an > complementary tool. This infrastructure allows the user to get visibility > into the ASIC by modeling it as a set of match/action tables. ... Series applied, thanks!
