> > I might have gotten it all wrong, but I was under the assumption that time-
> > stamped packets are periodic, and that the interval between two isn't
> > going to be so small.
> That is an incorrect assumption. Consider the Delay_Req packets
> arriving on a port in the MASTER state.
Right; I was ignore that, thinking only on the clients.
> > Is so, how does having a couple of additional instructions in between
> > jeopardizes the next time stamp?
> It is not just about the few instructions, but there is also
> preemption possible.
I believe qede would only call this under spinlock, so that's probably
not an issue.
Regardless, that's no reason not to change the behavior.
Thanks.
